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Module Specifications..

Current Academic Year 2023 - 2024

Please note that this information is subject to change.

Module Title Digital and Analogue Electronics II
Module Code EE201
School School of Electronic Engineering
Module Co-ordinatorSemester 1: Liam Meany
Semester 2: Liam Meany
Autumn: Liam Meany
Module TeachersLiam Meany
NFQ level 8 Credit Rating 5
Pre-requisite None
Co-requisite None
Compatibles None
Incompatibles None
Coursework can't be resat in August as it consists of Lab exercises.

To provide the student with a thorough understanding of the principles and practical aspects of modern digital and analogue circuits.

Learning Outcomes

1. Design and construct transistor circuits
2. Analyse and construct combinational and sequential logic circuitry
3. Design and construct basic arithmetic circuitry
4. Describe and explain I/O interfacing in computer systems

Workload Full-time hours per semester
Type Hours Description
Lecture24No Description
Tutorial9No Description
Laboratory15No Description
Independent Study77No Description
Total Workload: 125

All module information is indicative and subject to change. For further information,students are advised to refer to the University's Marks and Standards and Programme Specific Regulations at: http://www.dcu.ie/registry/examinations/index.shtml

Indicative Content and Learning Activities

BJT basics (NPN, PNP), Biasing, DC & AC analysis, Load-Line, Q-point, Common Emitter configuration v other configurations, Gain, Phase and the use of the transistor as an amplifier.

Combinational Logic
Encoders/Decoders, Multiplexers/Demultiplexers design from gates, Odd & Even Parity and use of Hamming Code for detecting/correcting bit errors.

Binary Arithmetic:
Look-ahead carry adders, Booth's Algorithm Multiplication, Floating point arithmetic & IEEE754 representation, Basic ALU design and construction.

Sequential Logic:
Sequence recogniser design using State Diagram, Next State Table, State Assignment and reduction.

Digital Circuitry:
TTL NAND gate analysis, Logic levels & Noise Immunity, Wired-AND & Tri-State Busing, MOS technologies with reference to speed, power consumption, noise margin, loading and gate construction.

Digital Storage:
Bistable latch, Organisation of memory systems with address decoders, RAM and ROM types.

Programmable Logic Devices:
PLA & PAL logic arrays, use of GAL22v10 device in programmable logic design.

Digital Interfacing:
I2C bus, USB2 communication, SPI, RS232/UART

Assessment Breakdown
Continuous Assessment25% Examination Weight75%
Course Work Breakdown
TypeDescription% of totalAssessment Date
Laboratory Portfolio5 x 3-hour lab exercises25%Every Second Week
Reassessment Requirement Type
Resit arrangements are explained by the following categories;
1 = A resit is available for all components of the module
2 = No resit is available for 100% continuous assessment module
3 = No resit is available for the continuous assessment component
This module is category 3
Indicative Reading List

  • Tocci, R. J.: 2010, Digital Systems, (11th Edition), Prentice Hall,
  • Floyd, T. L.: 2013, Digital Fundamentals, Pearson Education,
  • Katz, R. H.: 2004, Contemporary Logic Design, (2nd Edition), Prentice Hall,
  • Daniel Page: 2009, A practicel Introduction to Computer Architecture, Springer,
  • David Harris, Sarah Harris: 2012, Digital Design and Computer Architecture, (2nd Edition), Morgan Kaufmann,
  • Hambley, Allan: 2011, Electrical Engineering: principles and applications,
Other Resources

23854, DCU Loop, Liam Meany, 2013, Digital and Analogue Electronics II, https://loop.dcu.ie,
Programme or List of Programmes
ECEBEng Electronic & Computer Engineering
ECSAOStudy Abroad (Engineering & Computing)
Date of Last Revision18-APR-12

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