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Latest Module Specifications

Current Academic Year 2025 - 2026

Module Title Semiconductor Device Manufacturing
Module Code EEN1090
Faculty Electronic Engineering School Engineering & Computing
NFQ level 9 Credit Rating 7.5
Description

To provide students with advanced knowledge of semiconductor device manufacturing as it relates to CMOS integrated circuits and advanced packaging techniques; including process flows, integration considerations, design aspects and statistical methods. Technology CAD (TCAD) will form an integral component of the module. Students will be able to apply knowledge to device fabrication as it relates to other technologies such as photonic integrated circuits (PICs), micro-electromechanical systems (MEMS) and microfluidic applications.

Learning Outcomes



WorkloadFull time hours per semester
TypeHoursDescription
Lecture36Class based instruction on process theory, implementation and state-of-the-art limitations.
Assignment Completion50Conduct research on a contemporary semiconductor device; design and simulate a process flow using Technology CAD (TCAD); and appraise the process robustness with respect to yield.
Independent Study102Self-directed study of lecture materials and homework exercises.
Total Workload: 188
Section Breakdown
CRN21436Part of TermSemester 2
Coursework0%Examination Weight0%
Grade Scale40PASSPass Both ElementsY
Resit CategoryRC1Best MarkN
Module Co-ordinatorDonnacha LowneyModule Teacher
Assessment Breakdown
TypeDescription% of totalAssessment Date
AssignmentThe student will review a contemporary device, formulate a specification, design and simulate the process required to fabricate the device.25%Week 12
Formal ExaminationEnd of semester exam.75%End-of-Semester
Reassessment Requirement Type
Resit arrangements are explained by the following categories;
RC1: A resit is available for both* components of the module.
RC2: No resit is available for a 100% coursework module.
RC3: No resit is available for the coursework component where there is a coursework and summative examination element.

* ‘Both’ is used in the context of the module having a coursework/summative examination split; where the module is 100% coursework, there will also be a resit of the assessment

Pre-requisite None
Co-requisite None
Compatibles None
Incompatibles None

All module information is indicative and subject to change. For further information,students are advised to refer to the University's Marks and Standards and Programme Specific Regulations at: http://www.dcu.ie/registry/examinations/index.shtml

Indicative Content and Learning Activities

Semiconductor industry
Technology trends, market dynamics and process overview.

Crystal growth
Czochralski and Float Zone methods; impurity segregation; crystal defects.

Impurity control
Factory configuration; wafer cleaning, FEOL/RCA clean, BEOL clean; Gettering

Lithography
Contact, proximity and projection systems; diffraction regimes (Fresnel and Fraunhofer); aerial image and optical system characterisation; photoresists, DNQ/CAR, latent image; resolution enhancement techniques

Oxidation
Deal-Grove model, limits and kinetic dependencies; interface and electrical defects; CV measurements; high-k dielectrics.

Diffusion
Fick’s Laws, analytical approximations, modifications for electric field effects and concentration dependent diffusion; segregation and pile-up; atomic scale mechanisms.

Ion implantation
Implant profiles; nuclear and electronic stopping; Monte Carlo simulations; annealing, rapid thermal anneal (RTA); transient enhanced diffusion (TED).

Etching
Wet etching; plasma sheath and chemistry; plasma etching, isotropic, ion milling, ion-enhanced chemical and ion-enhanced inhibitor etching; plasma etching issues; atomic layer etching; chemical mechanical planarisation (CMP).

Deposition
Chemical vapour deposition (CVD, LPCVD, MOCVD, PECVD); atomic layer deposition (ALD); sputtering; evaporation; epitaxial techniques (ELO and MBE).

Interconnect and packaging
Signal (SI) and power (PI) integrity; material and process techniques for Al, Cu and low-k dielectrics; system in package (SiP) vs system on chip (SoC), multi-chip modules, chiplets, interposers, 2.5D/3D integrated circuits.

Yield Engineering
Fundamentals of statistics; distributions (discrete, Normal, Exponential, Chi-squared, t, F); analysis of variance (ANOVA) and hypothesis testing; functional and parametric yield modelling; design centering.

Metrology and control
Process metrology for wafer and equipment state; statistical process control (SPC), control charts and multivariate control; advanced process control (APC), run-by-run, multivariate and supervisory control

Indicative Reading List

Books:
  • James D. Plummer,Peter B. Griffin: 2023, Integrated Circuit Fabrication, Cambridge University Press, 679, 978-1-0093-0358-3
  • Gary S. May,Costas J. Spanos: 2006, Fundamentals of Semiconductor Manufacturing and Process Control, Wiley-IEEE Press, 488, 978-0-4717-8406-7
  • Gary S. May,Simon M. Sze: 2003, Fundamentals of Semiconductor Fabrication, Wiley, 320, 978-0-4712-3279-7
  • Sami Franssila: 2010, Introduction to Microfabrication, Wiley, 534, 978-0-4707-4983-8
  • Peter Van Zant: 2004, Microchip Fabrication, 5th Ed., McGraw Hill Professional, 658, 978-0-0715-0139-2


Articles:
None
Other Resources

None

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