Current Academic Year 2024 - 2025
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Date posted: September 2024
Module Title |
Circuits Analysis Techniques |
Module Code |
EE203 (ITS) / EEN1018 (Banner) |
Faculty |
Engineering & Computing |
School |
Electronic Engineering |
Module Co-ordinator | Marissa Condon | | Module Teachers | - | |
NFQ level |
8 |
Credit Rating |
5 |
Pre-requisite |
Not Available |
Co-requisite |
Not Available |
Compatibles |
Not Available |
Incompatibles |
Not Available |
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None A supervised loop test |
Description
To develop electrical network modelling and analysis skills.
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Learning Outcomes
1. Analyse linear RLC circuits. 2. Perform transient analysis of first and second order circuits. 3. Analyse basic nonlinear circuits.
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Workload |
Full-time hours per semester |
Type |
Hours |
Description |
Lecture | 24 | Lecture and class tests | Tutorial | 8 | tutorial | Independent Study | 93 | No Description | Total Workload: 125 |
All module information is indicative and subject to change. For further information,students are advised to refer to the University's Marks and Standards and Programme Specific Regulations at: http://www.dcu.ie/registry/examinations/index.shtml
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Indicative Content and Learning Activities
Linear Circuit AnalysisKirchhoff’ Laws, Nodal analysis. Superposition.Linear Circuit AnalysisSolution of first and second order differential equations. Switching circuits.
Laplace techniques.Dependent SourcesCircuits with dependent voltage and current sourcesNonlinear CircuitsCircuits involving elements such as diodes or op-amps |
Assessment Breakdown | Continuous Assessment | 100% | Examination Weight | 0% |
Course Work Breakdown |
Type | Description | % of total | Assessment Date |
Loop Quiz | Four supervised loop quizzes worth 25% each on the analysis of circuits. The quizzes shall take place approximately every three weeks. | 100% | As required |
Reassessment Requirement Type |
Resit arrangements are explained by the following categories:
Resit category 1: A resit is available for both* components of the module.
Resit category 2: No resit is available for a 100% continuous assessment module.
Resit category 3: No resit is available for the continuous assessment component where there is a continuous assessment and examination element. |
* ‘Both’ is used in the context of the module having a Continuous Assessment/Examination split; where the module is 100% continuous assessment, there will also be a resit of the assessment |
This module is category 1 |
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Indicative Reading List
- J. David Irwin, R.M. Nelms: 2015, Basic Engineering Circuit Analysis, 11, Wiley,
- R.C.Dorf/J.A. Svoboda: 2013, Introduction to electric circuits, 9,
- Giovanni Saggio: 2014, Principles of analog electronics, CRC Press, Taylor and Francis Group,
- Ozgur Ergul: 2017, Introduction to Electrical Circuit Analysis, John Wiley & Sons, 9781119284949
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Other Resources
None |
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