Registry
Module Specifications
Archived Version 2021 - 2022
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Description This module introduces computer architecture through a hardware description language (HDL). The course objectives are: to describe, simulate and synthesis of digital building blocks and an entire processor, such as arithmetic circuits, memories, using VHDL; to introduce the design of processors, covering the central concepts such as the fetch-decode-execute cycle, addressing mode and instruction encoding; Starting from a MIPS instruction set architecture, gradually expanding on the details, issues and techniques in modern, high-performance processor designs. Processor performance analysis. | |||||||||||||||||||||||||||||||||||||
Learning Outcomes 1. Describe computer architecture concepts and building blocks 2. Solve new computer architecture design problems within design constraints 3. Assess various design alternatives with quantitative and/or qualitative performance analysis 4. Develop synthesizable register transfer level VHDL models for designs of varying complexity | |||||||||||||||||||||||||||||||||||||
All module information is indicative and subject to change. For further information,students are advised to refer to the University's Marks and Standards and Programme Specific Regulations at: http://www.dcu.ie/registry/examinations/index.shtml |
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Indicative Content and
Learning Activities Hardware Description LanguageIntroduction to VHDL, VHDL for combinational logic design, sequential logic design and Finite State Machines (FSM)Digital Building BlocksAdder/subtractor, comparators, ALU, shifter and rotators, multiplication, division, counters, shift registers, memory arraysComputer ArchitectureInstruction set architecture, MIPS microarchitecture, single-cycle processors, multicycle processor, pipelined processors, resolving hazards, performance analysisMemory systemscaches, virtual memory, memory-mapped I/O, memory system performance analysis | |||||||||||||||||||||||||||||||||||||
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Indicative Reading List
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Other Resources 43189, Website, NANDLAND, 0, VHDL tutorials, https://www.nandland.com/vhdl/tutorials/index.html, 43190, Website, Weijun Zhang, 2001, VHDL tutorial: learn by example, http://esd.cs.ucr.edu/labs/tutorial/, | |||||||||||||||||||||||||||||||||||||
Programme or List of Programmes | |||||||||||||||||||||||||||||||||||||
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