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Module Specifications

Archived Version 2019 - 2020

Module Title
Module Code

Online Module Resources

NFQ level 9 Credit Rating 7.5
Pre-requisite None
Co-requisite None
Compatibles None
Incompatibles None

Module Motivation: This module will enable the student to develop an understanding of device fabrication as it relates to optical, microelectronic, sensors, and other miniaturised devices. The major enabling manufacturing technologies will be analysed as will process flow, integration, design aspects, and statistical methods in manufacturing .

Learning Outcomes

1. Design and analyse the processes involved in micro/nano systems manufacture
2. Calculate important features and limitations of micro and nano system design
3. Analyse the performance of a tool-set and relate to productivity and yield
4. Design device manufacturing process flows
5. Conduct the required background research related to the module topic and be able to identify opportunities for further technology development
6. Write well structured reports which are written to the correct level of technical detail to suit the intended reader

Workload Full-time hours per semester
Type Hours Description
Independent Study50Assignment Research & Delivery
Independent Study102Self-directed study of materials and study for the examination.
Total Workload: 188

All module information is indicative and subject to change. For further information,students are advised to refer to the University's Marks and Standards and Programme Specific Regulations at: http://www.dcu.ie/registry/examinations/index.shtml

Indicative Content and Learning Activities

Yield Engineering
Functional and parametric yield estimation, equipment issues

Metrology and Control
Tool control and monitoring, integration with factory information systems, statistical and advanced process control

Moore's Law, design rules, design for manufacture, basic VLSI circuits

Manufacturing Technologies
Lithography, Etch and Deposition, Planarisation, Laser Processing

Assessment Breakdown
Continuous Assessment% Examination Weight%
Course Work Breakdown
TypeDescription% of totalAssessment Date
Reassessment Requirement
Resit arrangements are explained by the following categories;
1 = A resit is available for all components of the module
2 = No resit is available for 100% continuous assessment module
3 = No resit is available for the continuous assessment component
Indicative Reading List

  • Gary S. May, Costas J. Spanos: 0, Fundamentals of semiconductor manufacturing and process control, IEEE ; c2006., [Piscataway], 9780471784067
Other Resources

32888, Website, 0, Module Loop Website, loop.dcu.ie,
Programme or List of Programmes